BE Lab Manual Experiment 12

Experiment 12

Aim: - To study J–K and T flip–flop.

Apparatus: - Flip–flop trainer kit, patch chords.

Theory: - A flip–flop Is a bistable electronic circuit that has two stable states i.e. its output is either 0 or +5V dc. The additional input of these gates provides a conventional means for the application of input signals to switch the flip–flop from one stable state to another.

The flip–flop has two outputs terms as Q and if the flip–flop is put into one state it will remain in that state as long as power is applied or until it is changed. In digital circuits, flip–flops are used in storage, counting, sequencing and timing applications.

J–K flip–flop

The J–K flip–flop is the most versatile binary storage element. The functioning of the J-K flip flop is identical to that of the S-R flip flop, except that it has no invalid state like that of the S-R flip-flop.

Figure (1) shows the symbol of J- K flip–flop & table (1) shows the truth table & figure (2) shows the logic diagram.

Truth table

Logic Symbol

Circuit:-

Procedure:-

  1. Study the circuit provided on the panel of the kit.
  2. Switch ‘ON’ the power supply.
  3. Now connect the circuit as shown in figure (2) i.e. J-K flip–flop with clock, by using patch chords.
  4. Apply the corresponding inputs to J & K and apply the clock pulse.
  5. Apply output Q to the gate G2 and  (complement) to the G1.
  6. Connect Q to the output indicator circuit.
  7. Verify the truth table (1).

Observation table:-

Result:-

Thus J – K flip – flop is studied and truth table is verified.

T flip–flop

A T flip–flop has a single control input, labeled T for toggle. When T is HIGH, the flip flop toggles on every new clock pulse. When T is LOW, the flip-flop remains in whatever state it was before.

Figure (3) shows the symbol of T flip–flop & table (2) shows the truth table & figure (4) shows the logic diagram. 

Truth Table 

Logic Symbol

Circuit:-

Procedure:-

  1. Study the circuit provided on the panel of the kit.
  2. Switch ‘ON’ the power supply.
  3. Now connect the circuit as shown in figure (4) i.e. T flip–flop with clock, by using patch chords.
  4. Apply the corresponding inputs to T and apply the clock pulse.
  5. Apply output Q to the gate G2 and  (complement) to the G1.
  6. Connect Q to the output indicator circuit.
  7. Verify the truth table (1).

Observation table:-

Result: - Thus T flip–flop is studied and truth table is verified.


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