Time Table Session 2021-22


 

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Alternate Logic-Gate Representations

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Alternate Logic-Gate Representations We have discussed the five basic logic gates (AND, OR, INVERTER, NAND, and NOR) and the standard symbols used to represent them in a logic circuit diagram. Most of the logic networks use standard symbols. But in some networks an alternative set of symbols is used in addition to the standard symbols. The table shows the alternate set of symbols for the five basic gates. Table: Alternate Logic Gate Representations To convert any normal symbol to its corresponding alternate symbol, the following steps are used: METHODOLOGY: TO CONVERT STANDARD SYMBOL TO ALTERNATE SYMBOL Step 1: Add bubbles (indication of inversion) at those input or output points where it is not present. Step 2: Remove all pre-existing bubbles of the normal symbol, if there is any at the point (only NOT, NAND and NOR gates) Step 3: If the existing normal logic symbol is AND, change it to OR, Similarly, if it is OR, then change it to AND. There is no change for the triangular symbol of ...
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Introduction of K-Map (Karnaugh Map) Part 2

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  5 variable K-Map in Digital Logic Karnaugh Map  or K-Map is an alternative way to write truth table and is used for the simplification of Boolean Expressions. So far we are familiar with 3 variable K-Map & 4 variable K-Map. Now, let us discuss the 5-variable K-Map in detail. Any Boolean Expression or Function comprising of 5 variables can be solved using the 5 variable K-Map. Such a 5 variable K-Map must contain   = 32 cells . Let the 5-variable Boolean function be represented as : f ( P Q R S T)  where P, Q, R, S, T are the variables and P is the most significant bit variable and T is the least significant bit variable. The structure of such a K-Map for SOP expression is given below : The cell no. written corresponding to each cell can be understood from the example described here: Here for variable  P=0, we have Q = 0, R = 1, S = 1, T = 1 i.e. (PQRST)=(00111)  . In decimal form, this is equivalent to  7 . So, for the cell shown above the c...
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BE Lab Manual Experiment 7

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Experiment 7  Aim: - To study Half and Full Subtractor Circuit using Logic gates. Apparatus:- Half Substractor and Full Substractor kit, patch chords, digital multimeter. Theory:- In a binary system, there are only two numbers, 0 & 1. there are four basic cases of binary subtraction. For Half Subtractor:-  Half Substractor is a logic circuit that performs the Substractor of two binary bits only. It Subtracts the B (Subtrahend) from A (minuend) and generates the difference (D) and borrow (Bo). Figure 1 shows the block systematic of half Subtractor    Truth table:- Operation:- The output of the EX-OR gate is called differences while the output of AND gate is the borrow. For Full Subtractor:  Full Substractor is a logic circuit that performs the subtraction of 3 bits, where A (minuend), B (subtrahend) C n–1 (borrow from the previous stage) are the inputs and Difference (D) and Borrow (B 0 ) are the outputs. The following figure shows the block  Truth table...
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