BCA 2nd Semester Syllabus (Digital Computer Organization)



 

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Quine-Mccluskey Method

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 Quine-Mccluskey Method It also known as Tabular method. It is more systematic method of minimizing expressions of even larger number of variables. It is suitable for hand computation as well as computation by machines i.e., programmable. . The procedure is based on repeated application of the combining theorem.  PA+P =P (P is set of literals) on all adjacent pairs of terms, yields the set of all PI‘s from which a minimal sum may be selected.  Consider expression ∑m(0,1,4,5)= + C+A +A C First,  second terms & third, fourth terms can be combined ( + ) + (C+ )= + A Reduced to (      +    ) = The same result can be obtained by combining m 0 & m 4 & m 1 &m 5 in first step & resulting terms in the second step. Procedure: Decimal Representation Don‘t cares PI chart EPI Dominating Rows & Columns Determination of Minimal expressions in c...
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Alternate Logic-Gate Representations

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Alternate Logic-Gate Representations We have discussed the five basic logic gates (AND, OR, INVERTER, NAND, and NOR) and the standard symbols used to represent them in a logic circuit diagram. Most of the logic networks use standard symbols. But in some networks an alternative set of symbols is used in addition to the standard symbols. The table shows the alternate set of symbols for the five basic gates. Table: Alternate Logic Gate Representations To convert any normal symbol to its corresponding alternate symbol, the following steps are used: METHODOLOGY: TO CONVERT STANDARD SYMBOL TO ALTERNATE SYMBOL Step 1: Add bubbles (indication of inversion) at those input or output points where it is not present. Step 2: Remove all pre-existing bubbles of the normal symbol, if there is any at the point (only NOT, NAND and NOR gates) Step 3: If the existing normal logic symbol is AND, change it to OR, Similarly, if it is OR, then change it to AND. There is no change for the triangular symbol of ...
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The Shift Register ( For academic Purpose Only)

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  The Shift Register The Shift Register is another type of sequential logic circuit that can be used for the storage or the transfer of binary data This sequential device loads the data present on its inputs and then moves or “shifts” it to its output once every clock cycle, hence the name  Shift Register . A  shift register  basically consists of several single bit “D-Type Data Latches”, one for each data bit, either a logic “0” or a “1”, connected together in a serial type daisy-chain arrangement so that the output from one data latch becomes the input of the next latch and so on. Data bits may be fed in or out of a shift register serially, that is one after the other from either the left or the right direction, or all together at the same time in a parallel configuration. The number of individual data latches required to make up a single  Shift Register  device is usually determined by the number of bits to be stored with the most common being 8-bits (on...
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